The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 18, 1997
Filed:
Jan. 17, 1995
David T Blaauw, Austin, TX (US);
Robert L Maziasz, Austin, TX (US);
Joseph W Norton, Austin, TX (US);
Larry G Jones, Austin, TX (US);
Mohankumar Guruswamy, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A method for designing an integrated circuit involves a four step process. First, a behavioral circuit model (BCM) is read which contains assignment statements which identify the logical operation of an integrated circuit (IC). The BCM is translated to a data file which described a plurality of interconnected logic gate functions to duplicate the operation of the BCM. The gates in the data file are then assigned a specific Vdd and ground rail size, a specific drive strength for speed considerations, and a cell pitch or height to optimize physical layout, in any order. The result in a physical design file which may be used to form masks and integrated circuits having optimized speed and optimized circuit area in a short design cycle.