Semiconductor memory device and a method of making the same

Abstract

A semiconductor memory device comprises a field shield element isolation structure defining a plurality of electrically isolated element regions and a plurality of memory cells in a matrix of rows and columns, each including a transistor having two impurity diffusion layers, a gate electrode and a capacitor. A plurality of bit lines extends in a row direction and a plurality of word lines in a column direction. A memory cell pair is formed in each of the element regions and includes two adjacent memory cells disposed in the row direction. Each of the transistors of the two memory cells in each pair has two impurity diffusion layers, one of which is common to both transistors and connected to one of the bit lines extending in the row direction immediately thereabove through a first pad polycrystalline silicon film. A second pad is formed on the other impurity diffusion layer of each transistor to extend over a portion of the element isolation structure and adjacent thereto in the column direction. A lower electrode of a capacitor of memory cell in each pair is formed on and insulated from the bit line connected to the common impurity diffusion layer of the respective transistors and to the other impurity diffusion layer through one of the second pad polycrysatalline films.