The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 11, 1997
Filed:
Jun. 05, 1995
Louis E Gates, Jr, Westlake Village, CA (US);
Michael D Runyan, Torrance, CA (US);
Hughes Electronics, Los Angeles, CA (US);
Abstract
A method of manufacturing an environmentally robust electronic module for aircraft avionics or other military or commercial electronic systems. The method produces a sealed chip-on-board electronic module and comprises the following steps. A printed wiring board is provided having an electrical interconnection circuit printed thereon. Bare integrated circuit chips directly mounted and wirebonded to the printed wiring board. Solderable components are then mounted and conductively connected to the printed wiring board to produce a chip-on-board electronic module. The chip-on-board electronic module is then passivated with silicon nitride to produce a sealed chip-on-board electronic module. The electronic module is passivated by applying a coating of silicon nitride using a plasma enhanced chemical vapor deposition process at a temperature near room temperature so that no stress is induced in the integrated circuit chips or wirebonds of the electronic module. The silicon nitride coating typically has a thickness on the order of one-half micron. After passivation, the sealed chip-on-board electronic module is encapsulated or a cover is disposed thereon.