The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 28, 1997
Filed:
Feb. 21, 1996
Hewlett-Packard Company, Palo Alto, CA (US);
Abstract
A method and apparatus for implementing a zero order hold function in the digital to analog conversion process in a digital control system reduces the phase lag contributed by the digital to analog conversion process relative to a conventional implementation of the zero order hold function. The apparatus for implementing the reduced phase lag zero order hold function employs a digital signal processor, a plurality of digital buffers, a digital multiplexing element, and a digital to analog converter. Phase lag is reduced by generating, from the digital to analog converter, for a fraction of the sample period, a waveform having a constant analog voltage with an amplitude which is scaled by the reciprocal of said fraction relative to a conventional zero order hold function. During the remainder of the sample period a substantially constant offset analog voltage is generated by the digital to analog converter. Alternatively, the time compression and amplitude scaling required to implement the reduced phase lag zero order hold function can be performed within the digital signal processor in the digital control system.