The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 1997

Filed:

Dec. 28, 1994
Applicant:
Inventors:

Moriyasu Banno, Yokohama, JP;

Tatsuo Inoue, Kawasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395490 ; 395186 ;
Abstract

A microcomputer has an internal program memory for storing a program and/or data, an external program memory for storing a program and/or data, a CPU for outputting a first address, for fetching an instruction stored at a location indicated by the first address from the internal program memory or the external program memory and executing the fetched instruction, and for, when the instruction instructs to read out a program or data, outputting a second address, and an internal program memory read protection circuit for receiving the first address output from the CPU and checking if the first address is present in the address space of the internal program memory, for receiving, from the CPU, the second address indicating the storage location of a program or data to be read out in accordance with the instruction and checking if the second address is present in the address space of the internal program memory. When the first address is not present in the address space of the internal program memory and the second address is present in the address space of the internal program memory, the internal program memory read protection circuit outputs a read inhibition signal to the internal program memory. The internal program memory does not execute a read access upon reception of the read inhibition signal.


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