The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 21, 1997
Filed:
Sep. 30, 1994
Applicant:
Inventors:
Joseph F Rantala, Worcester, MA (US);
John K Grooms, Webster, MA (US);
Charles F Cassidy, Northboro, MA (US);
Assignee:
Quantum Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395440 ; 395431 ; 395432 ; 395489 ; 395471 ; 395483 ; 39518204 ;
Abstract
A memory system having volatile storage of data destined for secondary storage and smaller intermediate non-volatile storage of some of the data. The volatile memory is an array of DRAM storage devices integrated with the non-volatile memory array of SRAM devices by a mapping logic unit. The DRAM array stores all the data blocks destined for secondary storage. In contrast, the smaller SRAM array stores only the data requiring safe storage, which typically is a subset of the data stored in the DRAM array. The mapping logic unit manages the use of the SRAM array.