The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 14, 1997
Filed:
Jun. 01, 1995
Akihiro Shiratori, Kanagawa, JP;
NEC Corporation, Tokyo, JP;
Abstract
An interconnection test for a design of an LSI including a functional circuit is executed on a simulator. The test method is applied to interconnections between the external pins of the LSI and inputs of a functional circuit or microcomputer. Input pulses each having a pulse width smaller than the minimum effective pulse width are sequentially input from the external pins while the inputs of the microcomputer are being monitorred. The simulator generates an output signal when it detects a pulse having a pulse width smaller than the minimum effective pulse width, thereby indicating the correctness of the interconnections. The interconnection test is executed prior to a separate functional test for the microcomputer.