The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 07, 1997

Filed:

Jan. 18, 1996
Applicant:
Inventors:

Hirofumi Kawai, Yokohama, JP;

Hiroyuki Miyakawa, Kawasaki, JP;

Koji Kimura, Chigasaki, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
257508 ; 257510 ; 257520 ; 257622 ;
Abstract

The opening width of an element isolating trench is Wa'. The opening width of a substrate potential setting trench is Wb'. When the maximum film thickness of a polysilicon film lying on the side wall of each of the trenches is set to t, the opening width Wa' of the element isolating trench and the opening width Wb' of the substrate potential setting trench satisfies a condition that (Wa'-2t)<(Wb'-2t) and Wa'>2t. A silicon oxide film covers the entire portion of the internal surface of the element isolating trench and covers the internal surface of the substrate potential setting trench except the bottom portion thereof. Therefore, the polysilicon film in the element isolating trench is set in the electrically floating state and the polysilicon film in the substrate potential setting trench is connected to the semiconductor substrate.


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