The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 07, 1997
Filed:
Jul. 10, 1995
Sung Chul Lee, Chungcheongbuk-do, KR;
Jang Han Kim, Chungcheongbuk-do, KR;
LG Semicon Co., Ltd., Chungcheongbuk-do, KR;
Abstract
A method of manufacturing a nonvolatile memory device having a self-aligned structure includes the steps of forming a gate insulating film on a semiconductor substrate of a first conductivity type. A semiconductor layer is formed on the gate insulating film and etched to form floating gates and a semiconductor pattern between the floating gates. Impurity ions of a second conductivity type are implanted into the same side of the substrate as the floating gate is formed, to form a drain region. A planarizing film is deposited on the substrate and etched until the upper surfaces of the floating gates and the semiconductor pattern are exposed. The semiconductor pattern is removed and impurity ions of the second conductivity type are implanted into the substrate, to form a source region. The planarizing film is removed to expose the floating gate, and a dielectric film is formed thereon. Finally, a control gate is formed on the substrate.