The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 1997

Filed:

Aug. 26, 1996
Applicant:
Inventors:

Alberto J Reyes, Phoenix, AZ (US);

Gary K Yeap, Gilbert, AZ (US);

James P Garvey, Chandler, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395500 ; 364489 ; 364490 ; 364578 ;
Abstract

A method of generating power vectors to calculate power dissipation for a circuit cell is provided. The method involves formulating the Boolean equations (30) that describe the logical operation for a circuit cell (10). Primitive power vectors that cause an output to transition are generated (32) using Boolean difference functions. Internal power vectors that cause an internal node to transition without transitioning the output are generated (34) using Boolean difference functions. Static power vectors with all possible steady state inputs are also generated (36). The power vectors are minimized (38) to eliminate redundant vectors. The resulting power vectors can be used in a circuit simulation in evaluating (40) the power dissipation of a designed logic circuit.


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