The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 30, 1997

Filed:

Apr. 27, 1995
Applicant:
Inventors:

Koichi Sato, Yokohama, JP;

Kazuhiro Tsuji, Yokohama, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341144 ; 341145 ; 341146 ; 341156 ; 341162 ; 341161 ;
Abstract

A digital-to-analog conversion circuit includes a first reference voltage generation circuit for generating a plurality of first reference voltages, a plurality of second reference voltage generation circuits for generating a plurality of second reference voltages created by dividing a difference in potential between adjacent two of the first reference voltages, a first selective control circuit for, upon receiving a first digital input signal group, selecting one of the first reference voltages and applying the selected one to a specified one of a plurality of signal lines during a first period, and selecting all of second reference voltages generated in one of the plurality of second reference voltage generation circuits and applying all the selected second reference voltages to signal lines other than the specified signal line, respectively, during a second period succeeding the first period, and a second selective control circuit for, upon receiving a second digital input signal group, applying a voltage of the specified signal line to an analog output terminal during the first period, and applying voltages of the signal lines other than the specified signal line to the analog output terminal during the second period.


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