The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 1997

Filed:

Apr. 16, 1996
Applicant:
Inventor:

Mark Leonard Buer, Chandler, AZ (US);

Assignee:

VLSI Technology, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04K / ;
U.S. Cl.
CPC ...
380 29 ; 380 38 ;
Abstract

A method for encrypting and decrypting digital data. The digital data is initially latched by an input register. Sixteen separate cipher stages cascaded in series are used to encrypt the digital data. These cipher stages are operating at a maximum frequency limited only by the process technology. The encoded digital data from the last cipher stage is stored in an output register. The input and output registers are capable of being docked at an interface frequency that is different from that of the DES core's data frequency. After an appropriate number of cycles have elapsed, the output register is sampled. A programmable counter is used to indicate when the output register contains valid encrypted data.


Find Patent Forward Citations

Buer, Mark. (1997). Data encryptor having a scalable clock (U.S. Patent No. 5671284). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5671284

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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