The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 23, 1997

Filed:

Dec. 15, 1995
Applicant:
Inventor:

Tsuguyasu Hatsuda, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518905 ; 36518909 ; 36518911 ; 365203 ;
Abstract

When a data is read out from a memory cell, a current mirror circuit is operated in response to detection of potential variation of a first data line, so that charge of a second data line is discharged by the current mirror circuit. At this point, a control transistor interposed between the first data line and the second data line is operated in a saturation region. As a result, the impedance between the first data line and the second data line becomes substantially infinity, and the two data lines are substantially open-circuited. Thus, the current mirror circuit discharges merely the second data line with a small load capacitance in a short period of time, resulting in a high speed read operation. Therefore, even when the first data line, to which a large number of memory cells are connected, has a large load capacitance, the read rate is increased.


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