The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 16, 1997

Filed:

Mar. 13, 1996
Applicant:
Inventors:

Hoai X Vu, Stanton, CA (US);

Toan Vu, Lake Grove, NY (US);

Assignee:

Symbol Technologies, Inc., Holtsville, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B / ;
U.S. Cl.
CPC ...
331 49 ; 331-2 ; 331 34 ; 331 56 ; 331 57 ; 3311 / ; 331179 ; 455 76 ;
Abstract

An oscillator is provided having a plurality of cascade coupled inverters Each one of the inverters is a differential amplifier having a p-input and an n-input. The output of each one of the amplifiers is connected to: the n-input of the next succeeding amplifier to provide a closed loop, or ring oscillator; and, the p-input of an amplifier positioned an even number of amplifier stages forward of such next succeeding amplifier. In a preferred embodiment, each amplifier in the ring includes an n channel transistor (nMOS transistor) connected in a totem pole arrangement, to a p channel transistor (pMOS transistor). The gate of the nMOS transistor provides the n-input and gate of the pMOS transistor provides the p-input. The source and drain paths of the pMOS and nMOS transistors are connected together to provide an output for the amplifier. With such arrangement, because the gate of the more slowly responding pMOS transistor is driven before the gate of the nMOS transistor the oscillator is adapted to operate at a higher frequency of oscillation.


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