The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 1997
Filed:
Oct. 06, 1995
Seppo Pienimaa, Salo, FI;
Nokia Mobile Phones Ltd., Salo, FI;
Abstract
A method for producing printed circuit boards (PCB), wherein a base material of a PCB, having copper claddings respectively on its opposed faces, is subject to the following subsequent processing steps. Holes are punched in the base material and claddings. The copper claddings are cleaned and deburred by mechanical and/or chemical techniques. Using image transfer and etching techniques, a pattern is produced in the cladding layers that exposes surface portions and leaves cladding portions adjacent to the holes of the base material. A photoimageable polymer insulating layer is applied to the exposed surfaces of the PCB base material and to the remaining pattern of cladding. The PCB is subjected to exposure and development, which exposes selected portions of the cladding layers including cladding portions adjacent to the holes. The opposite faces of the PCB are subjected to an adhesion improvement and activation treatment necessary for chemical deposition of metal. Image transfer is performed using a second photoimageable and developable insulating layer, and then metallization is applied to the hole walls and cladding portions adjacent to the holes by chemical deposition. In this process the desired conductor patterns, contact areas and interconnections are also produced onto activated areas not protected with the latter photoimageable insulating layer. A solder mask is applied to the PCB that protects the conductor pattern at areas except those intended for establishing contacts.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile