The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 02, 1997

Filed:

Mar. 30, 1995
Applicant:
Inventors:

Hirokazu Tanaka, Kawasaki, JP;

Tatsuo Kumano, Kawasaki, JP;

Tetsuji Funaki, Kawasaki, JP;

Takahiro Watai, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F / ; H03K / ;
U.S. Cl.
CPC ...
327412 ; 327317 ; 327318 ; 327563 ; 327575 ; 330255 ; 330267 ;
Abstract

An output circuit, for minimizing output idle current fluctuations and improve the output voltage range, has first and second transistors connected to first and second power sources, with a plurality of diodes connected to control terminals of the first and second transistors. The output circuit further includes a third transistor having a first terminal connected to the second power source and a second terminal connected to a predetermined position among the plurality of diodes. A predetermined voltage is applied from the diodes to the control terminal of the first transistor when the third transistor is saturated, to bring a level of an output of said output circuit close to a level of the second power source. A fourth transistor, a fifth transistor, a first resistor, and a capacitor are also provided. The forth transistor has a control terminal connected to an output of a differential circuit, and a first terminal connected to the second power source through the first resistor as well as to the control terminals of the third and fifth transistors. A second terminal is connected to the first power source, with the fifth transistor having a first terminal connected to the second power source and a second terminal connected to the control terminal of the second transistor. The capacitor is connected between the control terminal of the fourth transistor and the second terminal of the fifth transistor. This output circuit also limits the output voltage without changing the impedance of the high-impedance input.


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