Antifuse with double via, spacer-defined contact

Abstract

The present invention provides for a method of forming an antifuse in an integrated circuit having a first insulating layer on a semiconductor substrate. The method comprises forming a first metal interconnection layer on the first insulating layer; forming a relatively thin, second insulating layer over the first metal interconnection layer with a via where the antifuse is to be located to expose the first metal interconnection layer; forming first spacer regions on the sidewalls of the second insulating layer; forming a programming layer on the second insulating layer and in the via to contact the first metal interconnection line; forming second spacer regions on the sidewalls of the programming layer in the via; forming a barrier metal layer on the programming layer; forming a relatively thick, third insulating layer on the barrier metal layer with a second aperture to expose a portion of the barrier metal layer; and forming a second metal interconnection layer on the third insulating layer and in the second aperture to contact the portion of the second barrier metal layer. The spacer regions force programming to occur away from the sidewalls of the via for greater uniformity of programming voltages and greater stability on the R.sub.ON resistance. Additionally, the capacitance of the unprogrammed antifuse is reduced.