The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 1997
Filed:
Mar. 28, 1996
Masaji Ueno, Sagamihara, JP;
Yasukazu Noine, Chigasaki, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
An output circuit has a bipolar transistor circuit of a 1st and a 2nd bipolar transistor connected in Darlington configuration. The base of the 1st transistor is supplied with an input signal. The collector of the 2nd transistor is connected to a power supply through a 1st diode. And, a signal is outputted from the emitter of the 2nd transistor. The output circuit also includes a 1st PMOS transistor. The source of the 1st PMOS transistor is connected to the base of the 2nd transistor, its drain being grounded, and its the backgate being connected to the power supply through the 1st diode. The output circuit may further includes a 2nd PMOS transistor having a source and a backgate both connected to the power supply, a drain connected to the base of the 2nd transistor through a second diode, and a gate supplied with an inverting signal of the input signal. The output circuit may further includes: a 2nd PMOS transistor connected between the drain of the 1st PMOS transistor and ground, having a source and a backgate both being grounded, a drain connected to the drain of the 1st PMOS transistor, and a gate supplied with the input signal; and a 3rd bipolar transistor having a base connected to the drain of the 1st PMOS transistor, a collector connected to the base of the 2nd transistor, and an emitter being grounded.