The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 1997
Filed:
Feb. 28, 1996
Yasushi Aoki, Tokyo, JP;
Atsushi Katayama, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
The present invention has the object of improving operation speed and operation margin for a GTL driver. An output buffer circuit is of push-pull construction using N-channel MOS transistors MN11 and MN12. An output signal is fed back to pull-up transistor MN11 by way of NOR circuit NOR1, and a low-amplitude, high-speed signal waveform is outputted. The output of this output buffer circuit is inputted to a differential input circuit of another semiconductor integrated circuit. The reference input of the differential input circuit is connected to a reference voltage supply, and the input of the differential input circuit is terminated to the reference voltage supply by terminating resistance. By means of this configuration, the input amplitude of the differential input circuit oscillates with respect to the reference voltage without being affected by the power supply voltage of the output buffer circuit, the power supply voltage of the differential input circuit, or power-supply fluctuations of the reference voltage, thereby broadening the margin against noise.