Method for intraprocessor communication

Abstract

In a computer system in which nodes are connected to each other via a network, transmission and reception buffers of sender and receiver processes are prepared as resident areas in a main storage. A node of a receiver side notifies, prior to initiation of a communication, a physical address of a data reception area of the node to a node on a sender side. In the node on the sender side, the reported physical address is added to transmission data to transfer a resultant item. On the receiver side, reception data is written in a location of the main storage at the physical address. In the receiver node, the double buffering is employed to prevent an overwriting operation of another node onto the data reception area. The respective nodes achieve partial synchronization with adjacent nodes in chain, thereby automatically establishing synchronization between all nodes. A node on a receiver side notifies prior to initiation of a communication an identifier of a data reception area to a node on a sender side such that the sender node transmits data with the identifier added thereto. In the receiver node, the identifier added to the received data is compared with an identifier added to a data reception area thereof. If mismatching results, interruption is caused in a processor of the receiver node.