The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 12, 1997

Filed:

Dec. 28, 1995
Applicant:
Inventors:

Michael Bakhmutsky, Spring Valley, NY (US);

Viktor L Gornstein, New York, NY (US);

Howard B Pein, Briarcliff Manor, NY (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
341 67 ; 341 65 ;
Abstract

A high speed variable length decoder with an enhanced architecture for minimizing the propagation delays within the processing paths of the variable length decoder. The variable length decoder includes an input circuit for receiving code words and outputting a sequence of bits on a corresponding sequence of parallel lines that define a decoding window. The input circuit preferably includes a 'one-hot' bit stream barrel shifter matrix having a shift input. The decoding window is input to a 'one-hot' word length decoder that provides a numbered sequence of output lines. The 'one-hot' word length output of the 'one-hot' word length decoder is applied to an input of a 'one-hot' ring barrel shifter matrix, and an input of a 'one-hot' overflow barrel shifter matrix. The output of the 'one-hot' ring barrel shifter matrix is a 'one-hot' word pointer which shifts the decoding window to the next code word to be decoded. This enhanced 'one-hot' architecture greatly accelerates the word length computation loop of the variable length decoder of the present invention relative to the presently available variable length decoders having a conventional architecture. The decoding window is also connected to the input of a code word value decoder circuit. The code word value decoder circuit determines the values of code words and provides the decoded values at the output of the variable length decoder. A control circuit controls the operation of the value decoding circuit, the word length computation loop, and the input circuit, in accordance with a prescribed decoding protocol, e.g., an MPEG protocol.


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