Frequency-lock indicator circuit with frequency-only detection

Abstract

A frequency-lock indicator circuit is disclosed that compares first and second clock signals and indicates when the signals have the same frequencies for a consecutive number of times. The circuit includes a Frequency-Only Detector (FOD) which is immune to phase differences. The frequencies of the clock signals are compared through counters that will reset each other if a consecutive number of frequencies from the clock signals do not occur at the same time. Then, when a consecutive number of equal frequencies has occurred, a first pulse signal is generated, which in turn produces a lock indication signal, indicating that the first clock signal has the same frequency as the second clock signal, regardless of whether or not the phases of the clock signals are equal. The lock indicator circuit can be used in any PLL circuit regardless of the specific Frequency/Phase Detector used. The circuit can also be used in any application or circuit where two clocks need to be tracked. In addition, the FOD includes a loss of input clock feature that indicates if the input clock is lost.