The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 12, 1997
Filed:
Oct. 30, 1995
Thomas T Montoya, Austin, TX (US);
K David Woodliff, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A semiconductor wafer to be tested is placed inside a prober. A probe card (20') is placed inside a specially designed cavity (32) of a prober interface plate (24) that is pre-mounted superjacent to a head plate of the prober. The bottom surface (34) of the cavity provides solid and uniform support for the probe card. The probe card can be lifted out of the cavity whenever a probe card changeover is required. A tester interface plate (60) is pre-mounted to a test head. The tester interface plate has interlocking alignment pins (68 & 68') which are self-aligned into mating chamfered alignment holes (40 & 40') in the prober interface plate. Additionally, these two interface plates have mating interlocking features (46 & 70) for increased stability. The test stack allows the probe card to contact, typically through cantilevered pins; the active surface of the semiconductor wafer, and electrical probing or testing may then be performed on the semiconductor wafer.