The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 05, 1997

Filed:

Oct. 18, 1995
Applicant:
Inventors:

Kenji Kaneko, Sagamihara, JP;

Makoto Hanawa, Niiza, JP;

Kentaro Shimada, Kokubunji, JP;

Kazunori Nakajima, Hadano, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326121 ; 326 17 ;
Abstract

A static logic circuit employs pull-down type logic gates having logic transistors forming a power supply current path and logic transistors forming a grounding current path and having current drive abilities higher than those of the logic transistors forming the power supply current path, and pull-up type logic gates having logic transistors forming a power supply current path and logic transistors forming a grounding current path and having current drive abilities lower than the logic transistors forming the power supply current path, and comprises logic series formed by alternately cascading the two types of the logic gates. The static logic circuit is provided with signal merged logic circuits each of which provides a signal having a high speed falling transient and a high speed rising transient by merging the output signals of the logic series.


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