Charge integrating-type analog to digital converter employing rapid

Abstract

A Sigma Rho A/D converter (10) includes a transconductance element (R) having an input node for receiving an input voltage signal V.sub.in and an output node providing an analog current I.sub.in ; a charge integrator (12) having an input coupled to the output node, the charge integrator having feedback provided by an integrating capacitor C and an output node providing an output signal V.sub.o ; and a clocked voltage comparator (14) having an input coupled to V.sub.o for comparing V.sub.o to a reference potential. An output of the comparator updates in response to an occurrence of a first clock signal CLK1. A current sink (16) is switchably coupled to the output node of the transconductance element as a function of the logic state of the output of the comparator. A sum and dump accumulator (18) has an input coupled to the output of the comparator and an output having N output bits, and operates to sum together individual ones of first logic states and outputs a sum value on the N output bits in response to an occurrence of a second clock signal CLK2. The frequency of CLK2 is equal to CLK1/N. A unique bit stream is output from the comparator (14) for each allowed input voltage such that complete information about the input voltage is embedded within, or encoded by, the bit stream output from the comparator.