The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 22, 1997
Filed:
Sep. 12, 1996
Applicant:
Inventors:
Kei Hamade, Hyogo, JP;
Kenichi Yasuda, Hyogo, JP;
Mikio Asakura, Hyogo, JP;
Hideto Hidaka, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523001 ; 365222 ; 36523006 ;
Abstract
In a memory plane of a semiconductor memory device, transmission gate circuits for transferring data between local I/O line pair and global I/O line pair, and equalizing circuits for equalizing the local I/O line pair are arranged alternately on both sides of a shunt region. All the global I/O line pairs extend entirely over the memory plane. One and the other global I/O lines are arranged in symmetry, with a line for transmitting bit line precharge voltage, cell plate voltage or local input/output line equalizing signal being the center.