The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 1997

Filed:

Sep. 27, 1994
Applicant:
Inventors:

James C Moyer, San Jose, CA (US);

Lawrence R Sample, San Jose, CA (US);

Robert P Wolbert, San Jose, CA (US);

Assignee:

Micrel, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365226 ; 36518909 ; 365212 ;
Abstract

A digital value on a plurality of control input terminals of a PCMCIA power multiplexer integrated circuit determines which one if any of a plurality of power input terminals (for example, 12 volts, 5 volts, and 3 volts) is coupled through the integrated circuit to a power output terminal. A decoder which decodes the digital value prevents any two of the power input terminals from being coupled to the power output terminal at the same time. The decoder is programmable so that a single power multiplexer integrated circuit die layout can support a variety of PCMCIA controllers outputting different digital values. The integrated circuit has current limit, controlled power turn on times, and overtemperature protection. A signal indicative of a fault condition (for example, an overtemperature or a current limit condition) is output onto a fault output terminal of the integrated circuit.


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