The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 22, 1997

Filed:

May. 31, 1995
Applicant:
Inventors:

James B Burr, Foster City, CA (US);

Michael P Brassington, Sunnyvale, CA (US);

Assignee:

Sun Microsystems, Inc., Mt. View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 30 ; 437 40 ; 437 41 ; 437 44 ;
Abstract

Low threshold voltage MOS devices having asymmetric halo implants are disclosed herein. An asymmetric halo implant provides a pocket region located under a device's source or drain near where the source (or drain) edge abuts the device's channel region. The pocket region has the same conductivity type as the device's bulk (albeit at a higher dopant concentration) and, of course, the opposite conductivity type as the device's source and drain. Only the source or drain, not both, have the primary pocket region. An asymmetric halo device behaves like two pseudo-MOS devices in series: a 'source FET' and a 'drain FET.' If the pocket implant is located under the source, the source FET will have a higher threshold voltage and a much shorter effective channel length than the drain FET.


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