The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 1997
Filed:
Aug. 10, 1995
Hemanth G Kanekal, San Jose, CA (US);
Thomas C Yip, Los Gatos, CA (US);
Cirrus Logic, Inc., Fremont, CA (US);
Abstract
An apparatus and method for acquiring address and command information related to a synchronous bus transaction with at most zero hold-time over substantially the duration of the bus transaction. Due to state changes, bus transaction address and command information may become invalid over the duration of the bus transaction. A transparent latch circuit is used to make the information available as soon as the information is received and to acquire valid information related to the bus transaction before a rising clock edge of the next clock cycle following a bus transaction request. A synchronous flip-flop circuit is utilized simultaneously to capture alternate valid information related to a bus transaction having at most zero hold-time. The acquired valid information and the alternately acquired valid information ensure that stable and valid bus transaction information are available over substantially the duration of the transaction. Moreover, by decoding the information as soon as they are received (i.e., before the transparent latch circuit closes), a fast bus transaction acknowledgement signal can be generated.