The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 1997
Filed:
Jun. 07, 1995
Applicant:
Inventors:
Nang-Ping Chen, Cupertino, CA (US);
Robert J Ko, Saratoga, CA (US);
Jeong-Tyng Li, Cupertino, CA (US);
Thomas B Huang, San Jose, CA (US);
Ming-Yang Wang, Lafayette, CA (US);
Assignee:
Quickturn Design Systems, Inc., Mountain View, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
395500 ;
Abstract
A method and a structure for implementing integrated circuit designs into a plurality of clocked and unclocked reprogrammable logic circuits. Software structures analyze the target logic circuit, form clusters, partitions the integrated circuit design and implement the partitions into the clocked and unclocked reprogrammable logic circuits in order to prevent hold time violation artifacts.