The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 1997

Filed:

Aug. 31, 1995
Applicant:
Inventor:

Yoichi Tobita, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323313 ; 323314 ;
Abstract

An MOS transistor Q3 operates in a diode mode, and applies a voltage which is lower than a power supply voltage Vcc by an absolute value of its threshold voltage to the gate of an MOS transistor Q1. MOS transistor Q1 operates in a saturation region, and a supplies current which is in proportion to the difference between the threshold voltages of MOS transistors Q3 and Q1 to an output node 2. An MOS transistor Q4 also operates in a diode mode and applies a voltage equal to its threshold voltage to the gate of MOS transistor Q2. MOS transistor Q2 operates in a saturation region, and discharges current which is in proportion to the difference between the gate-source voltage and the threshold voltage. The currents flowing through MOS transistor Q1 and through MOS transistor Q2 are equal to each other. Accordingly, the dependency upon temperature of the threshold voltages is canceled, and thus an output voltage V0 with extremely low dependency upon temperature can be obtained at output node 2. A circuit which generates a reference voltage with no dependency upon power supply voltage and extremely low dependency upon temperature is provided.


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