The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 08, 1997

Filed:

Feb. 07, 1995
Applicant:
Inventor:

Hidenobu Miyamoto, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
1566431 ; 1566531 ; 1566561 ; 1566571 ;
Abstract

During etching of semiconductor substrate having a polysilicon layer and a silicide layer on the polysilicon layer by plasma etching to produce a processed semiconductor substrate having a patterned silicide layer and a patterned polysilicon layer, the semiconductor substrate is located on a supporting electrode. The temperature of the electrode is controlled to a predetermined temperature. The predetermined temperature may be, for example, 0.degree. C. The silicide layer is etched into the patterned silicide layer by plasma etching. The semiconductor substrate is placed in closer contact with the supporting electrode. A coolant gas is then supplied to the supporting electrode in order to cool the supporting electrode. The polysilicon layer is etched into the patterned polysilicon layer by plasma etching in order to produce the processed semiconductor substrate.


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