The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 01, 1997

Filed:

May. 18, 1995
Applicant:
Inventors:

David Mark Kalish, Laguna Niguel, CA (US);

Russell Lee Marrash, Irvine, CA (US);

Gary Carl Whitlock, Mission Viejo, CA (US);

Kha Nguyen, Anaheim, CA (US);

Assignee:

Unisys Corporation, Blue Bell, PA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395293 ; 395308 ; 39520001 ;
Abstract

Two partitioned systems are interconnected by bus exchange modules which connect to first and second system common busses. Each system common bus shares three or more requestors, and an arbitration logic unit in each partition manages bus access priority depending on certain existing conditions. Equitable access to each system bus is allocated and no one particular requestor will be locked out from bus access. Deadlock and starvation are prevented by setting one requestor module for normal top priority but also allocating secondary priority to the remaining two requestor modules by toggling and rotating priorities among these two requestor modules. Additionally, the arbitration logic allows the two requester retrying modules to request the bus at a temporarily higher priority, but limiting the number of retry cycles allowed to any given requesting module.


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