The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 01, 1997
Filed:
Sep. 17, 1993
Tsuyoshi Fukada, Aichi-gun, JP;
Yoshimi Yoshino, Inuyama, JP;
Hiroshige Sugito, Nagoya, JP;
Minekazu Sakai, Nukata-gun, JP;
Nippondenso Co., Ltd., Kariya, JP;
Abstract
It is intended to provide an etching method for semiconductor devices in which the etching depth or the thickness of a thin thickness portion can be precisely controlled. According to experiment results, when a P-type substrate in which an N-type epitaxial layer is formed is immersed in an etching solution such as KOH or the like, and a voltage for reverse bias of PN junction is applied between an electrode plate opposing the substrate and the epitaxial layer to perform electrochemical etching, it has been found that the distance from the PN junction plane to the etching stop position is approximately equal to a depletion layer width at the substrate side of the PN junction portion. Namely, the etching stops at the forward end of the depletion layer. Therefore, the junction depletion layer width at the substrate side is controlled to be a size obtained by subtracting a necessary depth for etching from a thickness of the semiconductor substrate except for the semiconductor layer, so that the etching depth or the thickness of the thin thickness portion remaining after etching can be precisely controlled.