The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 24, 1997
Filed:
Jul. 21, 1995
Raymond Louis Giordano, Flemington, NJ (US);
Harris Corporation, Palm Bay, FL (US);
Abstract
An automatic fault monitoring system prevents the detection of fault conditions during operating modes or conditions that can produce false fault conditions. A motor control system that utilizes an H-bridge circuit having active devices, preferably field effect transistors, in each arm of the bridge. The motor is connected in the leg of the bridge. Currents and voltages are sensed in each arm as different operating conditions represented by input control signals, which may be computer generated, drive the bridge and place the transistors in different states (on or off). Such operating conditions include rotation of the motor in opposite directions and reversal of direction. Fault detection logic is responsive to currents and voltages in the arms and leg of the bridge and provides outputs indicative of over-current fault conditions in the arm and open circuit fault conditions in the leg. Fault detection control logic analyzes the input control signals and also applies them to change the state of the transistors in the H-bridge. When the control signal inputs and the sequence in which they occur represents a command to the H-bridge to reverse the direction of rotation of the motor, the fault detection logic is inhibited thereby preventing false detection of over-current conditions that can occur in response to the back EMF generated by the motor as it stalls and stops briefly while reversing direction of rotation. The fault detection control logic also enables the detection of open load fault condition during states where the motor is being driven in either direction of rotation, but not when a reversal of rotation is occurring or the motor is started from a stopped position and the current in the motor must build exponentially.