The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 24, 1997

Filed:

Feb. 13, 1995
Applicant:
Inventors:

John C Sardella, Highland Village, TX (US);

Alexander Kalnitsky, Dallas, TX (US);

Assignee:

SGS-Thomson Microelectronics, Inc., Carrollton, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438592 ; 438636 ; 438671 ; 438657 ;
Abstract

A method for fabricating conductive structures in integrated circuits. A conductive layer is formed over an underlying region in an integrated circuit. The conductive layer is then doped with impurities, and a thin amorphous silicon layer is formed over the conductive layer. A photoresist layer is then deposited and exposed to define a masking pattern. During exposure of the photoresist layer, the amorphous silicon layer acts as an anti-reflective layer. Portions of the photoresist layer are then removed to form a masking layer, and the insulating layer and amorphous silicon layer are then etched utilizing the masking layer to form conductive structures. During subsequent thermal processing, impurities from the conductive layer diffuse into the amorphous silicon layer causing the amorphous silicon layer to become conductive.


Find Patent Forward Citations

Loading…