The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 17, 1997
Filed:
Feb. 28, 1995
Douglas R Beard, Eleva, WI (US);
Andrew E Phelps, Eau Claire, WI (US);
Michael A Woodmansee, Eau Claire, WI (US);
Richard G Blewett, Altoona, WI (US);
Jeffrey A Lohman, Eau Claire, WI (US);
Alexander A Silbey, Eau Claire, WI (US);
George A Spix, Eau Claire, WI (US);
Frederick J Simmons, Neillsville, WI (US);
Don A Van Dyke, Pleasanton, CA (US);
Cray Research, Inc., Eagan, MN (US);
Abstract
A vector processing system includes a main memory, vector registers, vector resources for accessing memory to transfer vector data between main memory and the vector registers and to perform operations on the vector data. Data words stored in non-consecutive address locations of a segment of main memory are accessed for processing. Offset address values of a number of the data words are stored in consecutive elements of a first vector register. A vector gather instruction is executed which adds each offset address value to a base address value to calculate main memory addresses representing main memory storage locations of the data words, retrieves the data words from the main memory, and stores the data words in consecutive elements of a second vector register in an order corresponding to that in which the offset address values are stored in the first vector register. A second vector instruction is chained to the gather instruction for performing an operation upon the retrieved data words and storing the results in a third vector register. A vector scatter instruction is chained to the second vector instruction to return the results to the main memory.