The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 1997

Filed:

Dec. 06, 1995
Applicant:
Inventors:

Shigeo Onishi, Nara, JP;

Kazuya Ishihara, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H01L / ;
U.S. Cl.
CPC ...
365145 ; 257295 ;
Abstract

A non-volatile random access memory comprises an MOS transistor having a gate insulation film formed on a semiconductor substrate, a gate electrode formed on the gate insulation film, and a pair of diffusion layers formed in the semiconductor substrate; and a ferroelectric capacitor having a bottom electrode connected to one of the diffusion layers of the MOS transistor, a capacitor ferroelectric film formed only on the bottom electrode, and a top electrode formed on the capacitor ferroelectric film; wherein at least side walls of the bottom electrode and the capacitor ferroelectric film are coated with lamination of a diffusion prevention film and a thin insulation film; an upper surface of the capacitor ferroelectric film is contacted with the top electrode; the other diffusion layer of the MOS transistor is connected to a bit line; the gate electrode is connected to a word line; and the top electrode of the ferroelectric capacitor is constituted so as to serve as a drive line.


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