The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 10, 1997

Filed:

Oct. 31, 1995
Applicant:
Inventors:

Tatsuhiro Hosokawa, Ibaraki, JP;

Hitomi Kaji, Hirakata, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 52 ; 36518909 ; 365195 ; 3652301 ;
Abstract

The present invention relates to a memory apparatus to be able to do write protection and aims to protect data in a specified area in a memory device not to be easily rewritten. When address signals A11 to A0 outputted from a microprocessor are written in the area 300 to 3FF, a CS signal from an address decoder for memory selection to a memory device is 'enable' and it is possible to read from and write in the memory device. In the case in which the address signals are written in the area 3F0 to 3FF, the address decoder for write protection becomes 'enable' and an output of an AND circuit is selected by a selector and is supplied to the memory device as a WE signal. If a write control signal is 'enable', the WE signal outputted from the microprocessor is not masked by the AND circuit and it is possible to write in the memory device.


Find Patent Forward Citations

Hosokawa, Tatsuhiro. (1997). Memory apparatus (U.S. Patent No. 5638316). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5638316

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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