The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 1997

Filed:

Aug. 11, 1994
Applicant:
Inventors:

Natale Aiello, Catania, IT;

Sergio Palara, Acitrezza, IT;

Salvatore Scaccianoce, Riposto, IT;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
327538 ; 327108 ; 327427 ; 327478 ;
Abstract

A circuit to limit the maximum current passed from a power transistor (T'p) to a load (ZL) which is connected to an output terminal of the transistor. The circuit includes an error amplifier (1'), a driver circuit (P') for the transistor (T'p), and a current detector for detecting the current (IL) flowing through the load (ZL). The current detector is provided with at least first and second terminals, includes a circuit block (2) having an input terminal connected to the control terminal of (T'p) and an output terminal connected to the current generator internal to the amplifier (1'), one input (B') of the amplifier (1') being connected to the first terminal of (Rs) and the other input (A') connected to the second terminal of (Rs). The introduction of the circuit block lowers the open-loop system gain making it stable and producing a smooth reduction of any rise in the load current (IL).


Find Patent Forward Citations

Loading…