Level converting circuit

Abstract

The present invention provides a level converting circuit comprising: a differential output transistor circuit for amplifying a difference between two mutually complementary input logic signals; a first output transistor circuit for outputting an inverted output logic signal based on a signal output by the differential output transistor circuit; and a second output transistor circuit for outputting an uninverted output logic signal based on a signal output by the differential output transistor circuit, wherein the first output transistor circuit further comprises first and second field-effect transistors and the second output transistor circuit further comprises third and fourth field-effect transistors. The differential output transistor circuit comprises a combination of first, second, third, fourth and fifth bais components which are each resistive element or a field-effect transistors. Assume that the uninverted logic output signal is lowered to an `L` level at a potential lower than that of the second differential output point. In this state, the fourth field-effect transistor of the second output transistor circuit performs a reversed operation, causing a drain current to flow to the output unit. Accordingly, the potential of the second differential output point is pulled down, displaying a feedback function that lowers back the gate potential of the third field-effect transistor of the second output transistor circuit and abruptly pulling up its `L` to `H` level.