The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 03, 1997

Filed:

Jun. 07, 1995
Applicant:
Inventors:

Chin-An Chang, Peekskill, NY (US);

Sang H Dhong, Mahopac, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; G06F / ;
U.S. Cl.
CPC ...
326 53 ; 364770 ;
Abstract

A zero-stopping incrementer operates on the recognition that half of all digital values that require incrementing will be even numbers; that is, the least significant bit (LSB) is a binary '0'. Incrementing such a number merely requires changing the LSB from a binary '0' to a binary '1'. For odd numbers (i.e., those where the LSB is a binary '1'), the zero-stopping incrementer searches for the first binary '0' beginning with the LSB. Once found, that binary '0' is changed to a binary '1' and all the binary '1s' preceding it are changed to binary '0s'. No change is required to the higher order bits following the first binary '0'. This operation is very fast, the worst case being the case when all the binary bits of the number to be incremented are '1s'. Nevertheless, the process is significantly increased, especially for 64-bit numbers which are processed by modern superscalar microprocessors. As compared with conventional incrementers using an adder-like scheme, the zero-stopping incrementer is about three times faster with power consumption less than half of the conventional incrementers.


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