The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 27, 1997
Filed:
Oct. 24, 1995
Minoru Saitoh, Kawasaki, JP;
Toshihide Sasaki, Shioya-gun, JP;
Hiroshi Tsukamoto, Shioya-gun, JP;
Michinori Yajima, Shioya-gun, JP;
Hiroaki Komatsu, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Fujitsu Automation Limited, Kawasaki, JP;
Abstract
In a logic simulation apparatus formed of dedicated hardware for simulating a logic operation of at least one logic circuit, and connected to at least one host computer, the apparatus includes: a plurality of clusters, each cluster including at least a communication network and a plurality of processor elements connected each other through the communication network; and an upper communication network for connecting among clusters. The host computer is connected to at least one cluster, and the connection configuration among the plurality of clusters is changeable in accordance with the size of the logic operation to be simulated under instructions of configuration change generated by the host computer. The apparatus further includes an error analysis system for the simulation process.