Clock system with internal monitor circuitry for secure testing

Abstract

A clock system includes internal monitor circuitry such that the clock system is testable in a secure environment. In particular, the clock system includes a plurality of separately enableable clock generator circuit modules. Each of the clock generator circuit modules generates a separate clock signal when enabled. Combining circuitry receives the separate clock signals from those clock generator circuit modules which are enabled and derives a derived clock signal therefrom. Monitor circuitry receives the derived clock signal, detects whether there are transitions in the derived clock signal, and provides a monitor indication of a result of the detection. Thus, the clock system can be tested without providing the separate clock signals outside the clock system. Preferably, the clock system also includes a programmable clock control register that holds clock control data, the clock control data determining which of the clock generator circuit modules are enabled. A processor is connected to program the clock control data in the clock control register circuitry. The processor executes a program that programs the clock control data to enable and then disable each of the clock generator circuit modules one at a time and to query the monitor indication while each of the clock generator circuit modules is enabled.