The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 20, 1997
Filed:
May. 23, 1995
Richard H Bruce, Los Altos, CA (US);
Jean Gastinel, Palo Alto, CA (US);
William F Gunning, Los Altos Hills, CA (US);
Michael Overton, Palo Alto, CA (US);
Xerox Corporation, Stamford, CT (US);
Abstract
A multi-level hierarchical bus architecture implemented with a multi-chip package and a modular shared-bus provides high bandwidth. All IC components are mounted on standardized multi-chip packages. Each multi-chip package includes bus interface chips for providing communication from the integrated circuits to a board bus. One multi-chip package contains additional bus interface circuitry for providing communication from the board bus to a backplane bus.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile