The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 1997

Filed:

Jul. 25, 1995
Applicant:
Inventors:

Nicholas Sporck, Saratoga, CA (US);

Teh-Kuin Lee, San Jose, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
327378 ; 327 35 ; 327 38 ; 327175 ;
Abstract

A process for evaluating acceptability of a digital circuit having a first type of circuit element for a first change of state and a second type of circuit element for a second change of state, the process comprising: generating a leading edge of a first pulse with a pulse generation circuit formed on a substrate in common with the digital circuit and having elements of the first and the second type; generating a trailing edge of a first pulse with a pulse generation circuit formed on a substrate in common with the digital circuit and having elements of the first and the second type; generating an accepted-rejected signal, functionally related to the width of the pulse.


Find Patent Forward Citations

Sporck, Nicholas. (1997). Process monitor for cmos integrated circuits (U.S. Patent No. 5631596). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5631596

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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