The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 20, 1997

Filed:

Apr. 25, 1996
Applicant:
Inventors:

William D Castro, Louisville, OH (US);

Donald F Zwolsky, Medina, OH (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ; G05F / ; G05F / ;
U.S. Cl.
CPC ...
323283 ; 323205 ;
Abstract

A digitally controlled active power factor corrected preregulator wherein a rectifier receives an alternating current voltage and generates an alternating line current and corresponding alternating line voltage with an optimum power factor. A power converter receives the alternating line current from the rectifier and converts it to a direct current and corresponding direct current voltage by virtue of a digital controller which adjusts the waveshape of the alternating line current to match the waveshape of the alternating line voltage to minimize line current distortion of the direct current. The digital controller includes a comparator for determining a difference between a reference voltage input and the direct current voltage to generate an error signal that is correlated by a look-up table to generate a correction signal. A digital pulse width modulator employs the correction signal and the alternating line current to generate a pulse width modulation signal that is received by the power converter to extend the conduction time of the rectifier throughout the cycle of the alternating current voltage. The pulse width modulator, which is programmable for different variables, includes a register for receiving a digital representation of the correction signal to generate an output received by a counter, wherein a plurality of flip-flops generate a duty cycle. The counter is decremented from the value of the register output by toggling the plurality of flip-flops according to a switching frequency so that the duty cycle enables the conduction of the rectifier while the counter is decremented and disenabling the conduction of the rectifier when the counter is at zero. The digital controller is adaptable for use with various power topologies, with or without power factor correction, and with motor controllers and motion controllers.


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