The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 1997

Filed:

Apr. 24, 1996
Applicant:
Inventors:

Henricus G Maas, Eindhoven, NL;

Ronald Dekker, Eindhoven, NL;

Armand Pruijmboom, Eindhoven, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257586 ; 257587 ; 257588 ;
Abstract

A semiconductor device with a bipolar transistor formed in a layer of semiconductor material (2) provided on an insulating substrate (1), in which material a collector zone (4), a base zone (5), and an emitter zone (6) are provided below a strip of insulating material (3) situated on the layer (2), which zones are connected to contact regions (7, 8, 9, 10) lying adjacent the strip (3), three of the contact regions (8, 9, 10) lying next to one another at a same side of the strip (3), of which two (8 and 9) are connected to the base zone (5) while the third (10), which lies between the former two (8 and 9), is connected to the emitter zone (6). The three contact regions (8, 9, 10) situated next to another at the same side of the strip (3) are provided alternately in the layer of semiconductor material (2) and in a further layer of semiconductor material (19) extending up to the strip (3). The three contact regions (8, 9, 10) connected to the base zone (5) and the emitter zone (6) may be provided with mutual interspacings which are smaller than the details which can be realised in a photoresist layer by means of the photolithographic process to be used in the manufacture of the transistor. As a result, the transistor can be manufactured with a very small extrinsic base.


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