The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 13, 1997
Filed:
Jan. 17, 1995
Applicant:
Inventors:
Naoki Nagashima, Kanagawa, JP;
Hiroshi Takahashi, Kanagawa, JP;
Assignee:
Sony Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438692 ; 216 38 ; 216 88 ; 438699 ; 438759 ;
Abstract
A layer planarizing method for a semiconductor device is provided to attain excellent controllability of a polishing amount to form a uniform and flat layer on a non-uniform wafer in polishing in a wafer surface. According to the method, a first layer is deposited over at least a top portion of a stepped portion formed on a surface of a body, the stepped portion covered with the first layer is covered with a second layer having a higher polishing rate than that of the first layer, and the second layer is polished until the first layer deposited on the top portion of the stepped portion is exposed.