The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 1997

Filed:

Jun. 30, 1994
Applicant:
Inventors:

David M Fenwick, Chelmsford, MA (US);

Daniel Wissell, Acton, MA (US);

Richard Watson, Harvard, MA (US);

Denis Foley, Shrewsbury, MA (US);

Assignee:

Digital Equipment Corporation, Maynard, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395558 ;
Abstract

A synchronous computer system is described. The system is a multiprocessor system having a bus system clock and a processor clock for each processor. The system includes a synchronous computer system bus and a plurality of circuit modules coupled to the synchronous bus with at least two of the modules having at least one processor, with the processor modules having the at least one processor which runs asynchronously to each of the other processors while the processor modules are synchronous to the system bus. The system further includes clock generator means for providing a corresponding plurality of clock signals and a plurality of conductors coupled between said clock generating means and said plurality of modules. Each of said conductors have electrical paths with substantially the same electrical path length, with each one of said modules further including means, coupled to a corresponding one of said conductors and disposed on said module, for regulating and adjusting skew between clock signals on said module.


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